View LC75386NE-R_3441766.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

overview the LC75386NE-R and 75386nw are electronic volume and tone control ics that can implement volume, balance, fader, bass/treble, loudness, input switching, and input gain control functions with a minimum number of external components. features volume: 81 positions: from 0 db to ?9 db in 1-db steps and . a balance function can be implemented by controlling the left and right volume settings independently. fader: either the rear or front outputs can be attenuated over 16 positions. (16 positions: from 0 db to ? db in 1-db steps, from ? db to ?0 db in 2-db steps, from ?0 to ?0 db in one 10-db step, ?5 db, ?0 db, and .) bass/treble: control over ?2 db in 2-db steps in each band. input gain: the input signal can be amplified by from 0 db to +18.75 db in 1.25-db steps. input switching: the left and right channels can each be selected from one of 6 inputs. (five are single-ended inputs and one is a differential input.) loudness: taps are output from a 2-db step volume control ladder resistor starting at the ?2-db position. a loudness function can be implemented by attaching external capacitors and resistors. on-chip buffer amplifiers minimize the number of required external components. minimal switching noise when no input signals are present due to fabrication in a silicon gate cmos process that minimizes the noise generated by internal switches. use of zero-cross switching circuits for internal switches minimizes switching noise when signals are present. built-in v dd /2 reference voltage generator circuit all controls can be set from serial input data. cmos ic 33000tn (ot) no.6170-1/24 sanyo electric co.,ltd. semiconductor company tokyo office tokyo bldg., 1-10, 1 chome, ueno, taito-ku, tokyo, 110-8534 japan electronic volume and tone control for car stereo systems LC75386NE-R, 75386nw ordering number : enn6170 ccb is a trademark of sanyo electric co., ltd. ccb is sanyo? original bus format and all the bus addresses are controlled by sanyo. any and all sanyo products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft? control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. consult with your sanyo representative nearest you before using any sanyo products described or contained herein in such applications. sanyo assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all sanyo products described or contained herein.
no.6170-2/24 LC75386NE-R, 75386nw 14.0 17.2 1.0 1.0 1.6 0.15 0.35 0.1 15.6 0.8 0.8 3.0max 1 16 17 32 33 48 49 64 2.7 14.0 17.2 1.0 1.0 1.6 0.8 sanyo: qip64e [LC75386NE-R] 10.0 12.0 1.25 0.5 1.25 1.25 0.5 1.25 0.18 12.0 116 17 32 33 48 49 64 10.0 0.5 1.7max 0.5 0.1 0.15 sanyo: sqfp64e [lc75386nw] package dimensions unit: mm 3159-qip64e 3190-sqfp64 parameter symbol conditions ratings unit min typ max supply voltage v dd v dd 6.0 10.5 v input high-level voltage v ih cl, di, ce, mute 4.0 v dd v input low-level voltage v il cl, di, ce, mute v ss 1.0 v input voltage amplitude v in v ss v dd vp-p input pulse width t ? cl 1 s setup time t setup cl, di, ce 1 s hold time t hold cl, di, ce 1 s operating frequency fopg cl 500 khz allowable operating ranges at ta = 25?, v ss = 0 v parameter symbol conditions ratings unit maximum supply voltage v dd max v dd 11 v maximum input voltage v in max all input pins v ss ?0.3 to v dd + 0.3 v allowable power dissipation pd max ta 85?, when mounted on a printed LC75386NE-R 500 mw circuit board lc75386nw 420 operating temperature topr ?0 to +85 ? storage temperature tstg ?0 to +125 ? specifications absolute maximum ratings at ta = 25?, v ss = 0 v
no.6170-3/24 LC75386NE-R, 75386nw parameter symbol pins conditions ratings unit min typ max [input block] input resistance rin l1 to l4, l6, r1 to r4, r6 30 50 70 k minimum input gain ginmin l1 to l4, l6, r1 to r4, r6 ? 0 +1 db maximum input gain ginmax +16.5 +18.75 +21 db inter-step setting error aterr ?.6 db left/right balance bal ?.5 db [volume block] input resistance rvr lvrin, rvrin, loudness off 113 226 339 k inter-step setting error aterr ?.5 db left/right balance bal ?.5 db [tone control block] inter-step setting error aterr ?.0 db bass control range gbass max. boost/cut ? ?2 ?5 db treble control range gtre max. boost/cut ? ?2 ?5 db left/right balance bal ?.5 db [fader block] input resistance rfed lfin, rfin 25 50 100 k 0 db to ? db ?.5 db inter-step setting error aterr ? db to ?0 db ? db ?0 db to ?0 db ? db ?0 db to ?0 db ? db left/right balance bal ?.5 db electrical characteristics at ta = 25?, v dd = 9 v, v ss = 0 v overall characteristics parameter symbol conditions ratings unit min typ max total harmonic distortion thd 1 v in = ?0 dbv, f = 1 khz 0.004 % thd 2 v in = ?0 dbv, f = 10 khz 0.006 % inter-input crosstalk ct v in = 1 vrms, f = 1 khz 80 88 db left/right channel crosstalk ct v in = 1 vrms, f = 1 khz 80 88 db maximum attenuation v o min 1 v in = 1 vrms, f = 1 khz 80 88 db v o min 2 v in = 1 vrms, f = 1 khz, inmute, with the fader set to 90 95 db output noise voltage v n 1 all controls flat, with the ihf-a filter 5 10 v v n 2 all controls flat, with a 20 hz to 20 khz bandpass filter 7 15 v current drain i dd 33 40 ma input high-level current i ih cl, di, ce, v in = 9 v 10 a input low-level current i il cl, di, ce, v in = 0 v ?0 ? maximum input voltage v cl thd = 1 %, r l = 10 k , all controls flat, f in = 1 khz 2.5 2.9 vrms common-mode rejection ratio cmrr v in = 0 db, f = 1 khz 45 db
no.6170-4/24 LC75386NE-R, 75386nw pin assignment 34 33 35 36 37 38 39 40 41 42 43 44 45 46 47 48 32 49 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 4 1 2 3 5 6 7 8 9 10 11 12 13 14 15 16 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 ltout lf3c3 lf3c2 lf3c1 nc nc nc lf1c3 lf1c2 lf1c1 ltin lvrout lcom lct lvrin lselo l5p lfin l5m lfout l4 lrout l3 lav ss l2 lzclp l1 dv ss l6 cl LC75386NE-R lc75386nw v dd di vref ce r6 mute r1 rav ss r2 rzclp r3 tim r4 rrout r5m rfout r5p rfin (top view) rselo rvrin rct rcom rvrout rtin rf1c1 rf1c2 rf1c3 nc nc nc rf3c1 rf3c2 rf3c3 rtout 200 0 400 600 800 1000 1200 1040 500 1400 ?0 ?0 0 20 40 60 80 100 420 200 200 0 400 600 800 1000 1200 1400 ?0 ?0 0 20 40 60 80 100 allowable power dissipation, pdmax ?mw ambient temperature, ta ? c mounted on the printed circuit board independent ic printed circuit board: 114.3 76.2 1.5 mm pd max ? ta [LC75386NE-R] [lc75386nw] allowable power dissipation, pdmax ?mw pd max ? ta ambient temperature, ta ? c mounted on the stipulated printed circuit board independent ic printed circuit board size: 114.3 76.1 1.6t mm printed circuit board material: fiberglass/epoxy
no.6170-5/24 LC75386NE-R, 75386nw equivalent circuit and sample application circuit diagram di vdd vdd ce cl 0.033 f 1 m 47 k 10 f 10 f pa l5p l5m l4 lfin com rfin rfout rrout tim rzclp ravss mute ce di cl lzclp lavss lrout lfout 31 35 34 33 32 logic circuit zero cross det multiplexer zero cross det ccb interface 30 29 28 27 26 25 24 23 22 21 20 19 18 17 pa dvss 10 f pa 10 f pa 36 37 38 39 40 41 42 43 44 45 46 47 48 14 15 16 13 12 11 10 9 8 7 6 5 4 3 2 1 50 49 51 52 53 54 55 56 57 58 59 60 61 62 63 64 l3 l2 l1 vdd vref r1 r2 r3 1 6 r4 r5m r5p [bass fo=100hz] [treble fo=10000hz] 1 f 0.033 f 0.01 f 330p f 10 f lf3c1 lf3c2 lf3c3 ltout lf1c2 nc nc nc nc nc nc lf1c3 lf1c1 lvrout ltin lvref vref lvref lcom lselo lvrin lct 10 f 220pf 1 f 0.1 f 68 k 4.7 k 10 f control circuit no signal timer multiplexer [bass fo=100hz] [treble fo=10000hz] 1 f 0.033 f 0.01 f 330pf 10 f rf3c1 rf3c2 rf3c3 rtout rf1c2 rf1c3 rf1c1 rvrout rtin vref vref rvref rvref rcom rselo rvrin rct 10 f rvref 220p f 1 f 0.1 f 68 k 4.7 k 10 f 22 f lvref lvref rvref lvref lvref rvref rvref r6 l6 1 m ?in the lc75386nw version, lzclp (pin 28) and rzclp (pin 21) are unused, and must be left open. vref 1 m
no.6170-6/24 LC75386NE-R, 75386nw pin functions pin no. pin function notes ?single end inputs 54 53 52 51 55 59 60 61 62 58 l1 l2 l3 l4 l6 r1 r2 r3 r4 r6 v dd lvref rvref ?input selector outputs 48 1 lsel0 rsel0 v dd ?differential inputs 50 49 63 64 l5m l5p r5m r5p v dd m v dd p lvref rvref ?inputs for the 2-db step volume control ?these inputs must be driven from low-impedance circuits. 47 2 lvrin rvrin v dd lvref rvref ?loudness function pins. connect the high-band compensation rc circuits between the lct (rct) and the lvrin (rvrin) pins and connect the low-band compensation rc circuits between the lct (rct) and vref. 46 3 lct rct v dd ?2-db step volume control outputs ?to reduce switching noise, each of these pins should be connected to vref through a capacitor. 45 4 lcom rcom v dd ?equalizer input 43 6 ltin rtin continued on next page. v dd lvref rvref
no.6170-7/24 LC75386NE-R, 75386nw continued from preceding page. pin no. pin function equivalent circuit c3 c2 c1 lvref rvref v dd ?equalizer input 33 16 ltout rtout v dd ?fader block inputs ?these inputs must be driven from low-impedance circuits. 32 17 lfin rfin v dd ?fader block outputs. the front and rear outputs can be attenuated independently. the attenuation is the same in the left and right channels. 31 30 18 19 lfout lrout rfout rrout v dd ?connections for the capacitors that for the tone control circuit attenuation filter. the low band compensation capacitors must be connected between the following pins: lf1c1 (rf1c1) and lf1c2 (rf1c2) lf1c2 (rf1c2) and lf1c3 (rf1c3) 42 41 40 7 8 9 lf1c1 lf1c2 lf1c3 rf1c1 rf1c2 rf1c3 ?connections for the capacitors that for the tone control circuit attenuation filter. the low band compensation capacitors must be connected between the following pins: lf3c1 (rf3c1) and lf3c2 (rf3c2) lf3c2 (rf3c2) and lf3c3 (rf3c3) 36 35 34 13 14 15 lf3c1 lf3c2 lf3c3 rf3c1 rf3c2 rf3c3 continued on next page. ?unused pins. these pins are not connected to the chip. 39 38 37 10 11 12 nc nc nc nc nc nc ?v dd /2 voltage generator block. a capacitor with a value of about 10 ? must be inserted between vref and av ss (v ss ) to reduce power supply ripple. 57 vref v dd lvref rvref
no.6170-8/24 LC75386NE-R, 75386nw continued from preceding page. pin no. pin function equivalent circuit v dd ?serial data and clock inputs used for device control 26 25 cl di v dd v dd ?used for the zero cross circuit no-signal timer function. if a zero cross signal does not occur between the point when data is loaded and the point when the timer times out, the data will be stored forcibly when the timer times out. 20 tim v dd lvref rvref band limiting for the zero cross detection circuit these pins are normally left open. these pins are unused in the lc75386nw version and must be left open. 28 21 lzclp rzclp 24 ce ?chip enable input. data is written to the internal latch when this pin goes from high to low. the analog switches then operate. data transfers are enabled when this pin is high. 44 5 lvrout rvrout ?1-db step volume control output ?power supply 56 v dd ?logic system ground 27 dv ss ?analog system ground 29 22 lav ss rav ss v dd ?external muting control ?when this pin is set to the v ss level, the fader volume block is forcibly set to ? . 23 mute LC75386NE-R only
no.6170-9/24 LC75386NE-R, 75386nw 1.25 db 2.50 db 3.75 db 5.00 db 6.25 db 7.50 db 8.75 db l5p l5m lselo 0 db r3=22.65 k r4=25 k r2=25 k r1=22.65 k 50 k 50 k 50 k 50 k lvref lvref lvref 6.702 k 5.804 k 5.026 k 4.532 k 3.769 k 3.264 k 2.826 k 2.447 k 2.119 k 1.835 k 1.589 k 1.376 k 1.192 k 1.032 k 0.894 k 5.774 k lvref 10.0 db 11.25 db 12.5 db 13.75 db 15.0 db 16.25 db 17.5 db 18.75 db l4 l3 lvref lvref in mute sw lvref l2 l1 50 k lvref l6 internal equivalent circuits selector block equivalent circuit total resistance: 50 k the right channel is identical. unit (resistance: )
no.6170-10/24 LC75386NE-R, 75386nw to the left channel 1-db step block lvref 41.139 k 32.678 k 25.957 k 20.618 k 16.378 k -2db -4db -6db -8db -10db -12db -14db 0db -16db -18db -20db -22db -24db -26db -28db -30db -32db -34db -36db -38db -40db -42db -44db -46db -48db -50db -52db -54db -56db -58db -60db -62db -64db -66db -68db -70db -72db -74db -76db -78db - db 13.009 k 10.334 k 8.208 k 6.520 k 5.179 k 4.114 k 3.268 k 2.596 k 2.062 k 1.638 k 1.301 k 6.344 k 5.040 k lct 5.750 k 4.003 k 3.180 k 2.526 k 2.006 k 1.594 k 1.266 k 1.006 k 0.799 k 0.634 k 0.504 k 0.400 k 0.318 k 0.253 k 0.201 k 0.159 k 0.127 k 0.101 k 0.080 k 0.063 k 0.050 k 0.040 k 0.154 k lvrin 2-db step volume control block equivalent circuit ?the total resistance above the tap is 195 k ?the total resistance below the tap is 30.847 k the right channel is identical. unit (resistance: )
no.6170-11/24 LC75386NE-R, 75386nw 1-db step volume control block equivalent circuit 5.438 k 44.564 k lvrout vref -1 db - db lcom 0 db unit: (resistance : ) total resistance: 50 k the right channel is identical. tone control block equivalent circuit ltout 50 k ltin 5.1 k lvref 5.1 k 0.711 k 0.648 k 12 db 1.015 k 1.751 k 3.595 k 10.977 k 10 db 8 db 6 db 4 db lf1c1 lf1c2 lf1c3 68 k 1 k lvref lvref lvref lvref 0.711 k 0.648 k 12 db 1.015 k 1.751 k 3.595 k 10.977 k 10 db 8 db 6 db 4 db lf3c1 lf3c2 lf3c3 68 k 1 k from the left channel 2-db volume control block switch used for initial setup switch used for initial setup unit: (resistance : )
no.6170-12/24 LC75386NE-R, 75386nw fader volume control block equivalent circuit lfin 5.437 k 4.846 k 8.169 k 4.094 k lfout lvref -1 db -2 db 0 db s1 s2 s3 s4 6.489 k 5.154 k -6 db -8 db -4 db 3.252 k 2.583 k 2.052 k 3.419 k -12 db -14 db -10 db 1.630 k 1.295 k -18 db -20 db -16 db 1.300 k 0.231 k -45 db -60 db - db -30 db 0.050 k lrout when fader is set to 1, s2 and s3 will be turned on. when fader is set to 0, s1 and s4 will be turned on. unit: (resistance : ) total resistance: 50 k if data that sets the main volume control 1-db step circuit to is sent to the device, switches s1 and s2 will be opened (off) and switches s3 and s4 will be closed (on).
control system timing and data format the LC75386NE-R/nw are controlled by applying the stipulated data to the cl, di, and ce pins. the data consists of a total of 52 bits, of which 8 bits are the device address and 44 bits are the actual control data. address code (b0 to a3) the LC75386NE-R/nw have an 8-bit address codes, and can be used along with other ics that support the sanyo ccb serial bus. no.6170-13/24 LC75386NE-R, 75386nw ce di d43 d42 d41 d40 d39 d38 d5 d4 d3 d2 d0 d1 a3 a2 a1 a0 b3 b2 b1 b0 cl min min t dest 1 s 1 s 1 s 1 s1 s1 s min min min ce di cl address code b0 b1 b2 b3 a0 a1 a2 a3 10000001 (lsb) (81hex) control code allocation d0 d1 d2 setting 0 0 0 l1 (r1) 1 0 0 l2 (r2) 0 1 0 l3 (r3) 1 1 0 l4 (r4) 0 0 1 l5 (r5) 1 0 1 l6 (r6) 011 111 input switching control ic test values. these values must not be used during normal operation. d3 ic test bit. this bit must be set to 0 during normal operation.
no.6170-14/24 LC75386NE-R, 75386nw d4 d5 d6 d7 operation 0 0 0 0 0 db 1 0 0 0 +1.25 db 0 1 0 0 +2.50 db 1 1 0 0 +3.75 db 0 0 1 0 +5.00 db 1 0 1 0 +6.25 db 0 1 1 0 +7.50 db 1 1 1 0 +8.75 db 0 0 0 1 +10.0 db 1 0 0 1 +11.25 db 0 1 0 1 +12.5 db 1 1 0 1 +13.75 db 0 0 1 1 +15.0 db 1 0 1 1 +16.25 db 0 1 1 1 +17.5 db 1 1 1 1 +18.75 db input gain control
no.6170-15/24 LC75386NE-R, 75386nw d8 d9 d10 d11 d12 d13 d14 d15 operation 1-db step 0 0 db 1 ? db 2-db step 0 0 0 0 0 0 0 0 db 1 0 0 0 0 0 0 ? db 0 1 0 0 0 0 0 ? db 1 1 0 0 0 0 0 ? db 0 0 1 0 0 0 0 ? db 1 0 1 0 0 0 0 ?0 db 0 1 1 0 0 0 0 ?2 db 1 1 1 0 0 0 0 ?4 db 0 0 0 1 0 0 0 ?6 db 1 0 0 1 0 0 0 ?8 db 0 1 0 1 0 0 0 ?0 db 1 1 0 1 0 0 0 ?2 db 0 0 1 1 0 0 0 ?4 db 1 0 1 1 0 0 0 ?6 db 0 1 1 1 0 0 0 ?8 db 1 1 1 1 0 0 0 ?0 db 0 0 0 0 1 0 0 ?2 db 1 0 0 0 1 0 0 ?4 db 0 1 0 0 1 0 0 ?6 db 1 1 0 0 1 0 0 ?8 db 0 0 1 0 1 0 0 ?0 db 1 0 1 0 1 0 0 ?2 db 0 1 1 0 1 0 0 ?4 db 1 1 1 0 1 0 0 ?6 db 0 0 0 1 1 0 0 ?8 db 1 0 0 1 1 0 0 ?0 db 0 1 0 1 1 0 0 ?2 db 1 1 0 1 1 0 0 ?4 db 0 0 1 1 1 0 0 ?6 db 1 0 1 1 1 0 0 ?8 db 0 1 1 1 1 0 0 ?0 db 1 1 1 1 1 0 0 ?2 db 0 0 0 0 0 1 0 ?4 db 1 0 0 0 0 1 0 ?6 db 0 1 0 0 0 1 0 ?8 db 1 1 0 0 0 1 0 ?0 db 0 0 1 0 0 1 0 ?2 db 1 0 1 0 0 1 0 ?4 db 0 1 1 0 0 1 0 ?6 db 1 1 1 0 0 1 0 ?8 db mute 11111 10 volume control
no.6170-16/24 LC75386NE-R, 75386nw d16 d17 d18 d19 bass d24 d25 d26 d27 treble 0 1 1 0 +12 db 1 0 1 0 +10 db 0 0 1 0 +8 db 1 1 0 0 +6 db 0 1 0 0 +4 db 1 0 0 0 +2 db 0 0 0 0 0 db 1 0 0 1 ? db 0 1 0 1 ? db 1 1 0 1 ? db 0 0 1 1 ? db 1 0 1 1 ?0 db 0 1 1 1 ?2 db d20 d21 d22 d23 setting 0 0 0 0 must be set to 0. tone control fader volume control d28 d29 d30 d31 operation 0 0 0 0 0 db 1 0 0 0 ? db 0 1 0 0 ? db 1 1 0 0 ? db 0 0 1 0 ? db 1 0 1 0 ? db 0 1 1 0 ?0 db 1 1 1 0 ?2 db 0 0 0 1 ?4 db 1 0 0 1 ?6 db 0 1 0 1 ?8 db 1 1 0 1 ?0 db 0 0 1 1 ?0 db 1 0 1 1 ?5 db 0 1 1 1 ?0 db 1111 channel selection control d32 d33 setting 0 0 left and right together. this is the mode set up initially 1 0 rch 0 1 lch 1 1 left and right together fader rear/front control d34 setting 0 rear 1 front
no.6170-17/24 LC75386NE-R, 75386nw loudness control d35 setting 0 off 1on zero cross control d36 d37 setting 0 0 data is written when a zero cross is detected 1 1 the zero cross detection operation is disabled and data is written on the falling edge of the ce signal d38 d39 d40 d41 setting 0 0 0 0 selector 1 0 0 0 volume 0 1 0 0 tone 1 1 0 0 fader zero cross signal detection block control test mode control d42 d43 setting 0 0 these ic test mode control bits must be set to 0
usage notes data transmission after power is first applied ?when power is first applied, the state of the internal analog switches will be undefined. applications that use this ic must include external circuits to provide muting until control data has been transferred to the ic. ?after power is first applied, applications should send initial setup data to stabilize the bias levels in each of the ic circuit blocks in a short time. 1. the time between initial setup mode and the first actual data settings ?applications should send the initial setup data as soon as v dd rises above 6 v. ?after the lcom and rcom pins have stabilized at the vref level, applications should send the first data settings. 2. procedure for setting up initial setup mode ?when d32 and d33 are set to 00, the ic? internal initial setup switch is turned on and the ic goes to quick charge mode. at this time the other data (d0 to d31 and d34 to d43) will also be set up for the left and right channels at the same time. this means that applications can set up the states of the various blocks at the same time as specifying initial setup mode. 3. procedure for clearing initial setup mode ?initial setup mode is cleared by setting d32 and d33 to any value other than 00. in other words, any normal left or right channel specification will turn the internal initial setup switch off and clear quick charge mode. no.6170-18/24 LC75386NE-R, 75386nw the time required for the capacitors connected to the lcom and rcom pins to be charged to the vref level vref v dd these operations clear initial setup mode the 1/2 v dd level v dd = 9 v (typ) v dd = 6 v initial setup mode first data for the left channel first data for the right channel data
zero cross switching circuit operating principles the LC75386NE-R/nw include functions for switching the place where the zero cross comparator operates and thus allows applications to select the optimal detection location for the block for which the control data is updated. basically, switching noise will be minimized if the signal immediately following the block for which the control data is updated is input to the zero cross comparator. thus the detection location must be changed for each data update operation. another issue is the point that if the signal amplitude is lower than the detection sensitivity (a few mv rms) of the zero cross comparator (for example if the volume is set to a low level), the switching noise can be minimized further by selecting a point before the volume control block, namely the selector block output, as the zero cross detection point than by simply waiting for the data write to occur due to the overflow of the zero cross timer. for example, if the volume block input is 1 v rms, and the volume is set to ?0 db or lower, the output will be under 10 mv rms. in this case, detecting at the selector output block will result in lower switching noise. no.6170-19/24 LC75386NE-R, 75386nw zero cross switching control procedure the zero cross switching control procedure consists of first setting the zero cross detection mode with the zero cross control bits (d36 and d37 = 0) and then, after specifying the detection block (with bits d38, d39, d40, and d41), sending the control data. since these control bits are latched first immediately after the data is sent, i.e. on the falling edge of the ce signal, it is possible to both set the ic mode as well as specify zero cross switching operation in a single data transfer, even when updating the volume and other data. the following presents an example of the control operation when updating the volume block data. d36 zero cross detection mode specification volume block setting d37 d38 d39 d40 d41 001000 zero cross timer setting when the input signal has a level lower than the sensitivity of the zero cross comparator, or consists only of extremely low frequencies, the zero cross detection circuit will remain in the state in which it cannot detect a zero cross and the data will not be latched during that period. the zero cross timer specifies a time after which the data will be latched forcibly in states where a zero crossing cannot be detected. the time is determined by the lowest frequency for which a zero cross can be detected reliably. for example, if the timer is set to 25 ms: t = 0.69 cr if c is taken to be 0.033 ?, then r will be: r = 25 10 -3 1.1 m 0.69 0.033 10 -6 selector volume tone fader switch zero cross comparator zero cross detection circuit
notes on serial data transfer 1. the cl, di, and ce pin signal lines must be covered (and thus shielded) by the ground pattern or formed from shielded cable to prevent the high-frequency digital signals on those lines from entering the analog system. 2. the LC75386NE-R/nw data formats consist of 8 bits of address and 44 bits of data. when the data is sent in units of 8 bits each (i.e. 48 bits are actually sent), use the data transfer technique shown in figure 1. LC75386NE-R/nw data receptions in 8-bit units no.6170-20/24 LC75386NE-R, 75386nw dummy data 3. during ccb transfers, this ic detects address matches on the rising edge of the ce signal. therefore, applications must set the cl signal low and then set it high at this time. d43 d42 d41 d40 d39 d38 d37 d36 ....... d3 d2 d1 d0 x x x x input switching control test mode control x: don't care
no.6170-21/24 LC75386NE-R, 75386nw 0 - 2 - 4 - 6 - 8 - 10 - 12 - 14 - 16 - 18 - 20 - 22 - 24 - 26 - 28 - 30 - 32 - 34 - 36 - 38 - 40 - 42 - 44 - 46 - 48 - 50 - 52 - 54 - 60 10 23 57 23 57 23 57 23 57 100 1k 10k 100k - 50 - 40 - 30 - 20 - 10 0 10 20 loudness characteristics level ?db frequency, f ?hz 0 - 2 - 4 - 6 - 8 - 10 - 12 - 14 - 16 - 18 - 20 - 22 - 24 - 26 - 28 - 30 - 32 - 34 - 36 - 38 - 40 - 42 - 44 - 46 - 48 - 50 - 52 - 54 0 - 60 10 23 57 23 57 23 57 23 57 100 1k 10k 100k - 50 - 40 - 30 - 20 - 10 10 20 output level characteristics v dd = 9 v, v ss = 0 v, v in = 0 dbv flat overall input = l1, output = lfout settings: the 0 db to ?4 db positions (in ? db steps) v dd = 9 v, v ss = 0 v, v in = 0 dbv flat overall input = l1, output = lfout settings: the 0 db to ?4 db positions (in ? db steps) output level ?dbv frequency, f ?hz
no.6170-22/24 LC75386NE-R, 75386nw - - 70 - 60 - 50 - 40 - 30 - 20 - 10 0 - 80 - 70 - 60 - 50 - 40 - 30 - 10 - 20 0 - - 70 - 60 - 50 - 40 - 30 - 20 - 10 0 - 90 - 80 - 70 - 60 - 50 - 40 - 30 - 10 - 20 0 04 2 6 8 101214161820 0 2 4 6 8 10 12 18 14 16 20 10 23 57 23 57 23 57 23 57 100 1k 10k 100k 0.01 0.1 1.0 7 5 3 2 7 5 3 2 7 5 3 2 0.001 v v v thd meter fader block main volume step characteristics attenuation ?db step ?db input gain block main volume block graphic equalizer block gain step characteristics step ?db output level ?db fader volume step characteristics step ?db fader volume attenuation ?db thd ?frequency characteristics total harmonic distortion, thd ?% frequency, f ?hz fader block input gain block main volume block graphic equalizer block fader block input gain block main volume block graphic equalizer block fader block input gain block main volume block graphic equalizer block v dd = 9 v, v ss = 0 v, v in = ?0 dbv input = l1, output = lfout 80-khz low pass weighting v dd = 9 v v ss = 0 v v in = 0 dbv f = 1 khz v dd = 9 v v ss = 0 v v in = ?0 dbv f = 1 khz v dd = 9 v v ss = 0 v v in = 0 dbv f = 1 khz
no.6170-23/24 LC75386NE-R, 75386nw 3 2 5 7 3 2 5 7 3 2 5 7 3 2 5 7 3 2 5 7 3 2 5 7 f = 1khz f = 20khz v in = 0dbv, f = 20khz v in = 0dbv, f = 1khz v in = -10dbv, f = 20khz v in = -10dbv, f = 1khz 10 100 7 5 3 27 5 3 27 5 3 27 5 3 2 1k 10k 100k - 40 - 35 - 30 - 25 - 20 - 15 - 10 - 5 10 100 7 5 3 27 5 3 27 5 3 27 5 3 2 1k 10k 100k - 40 - 35 - 30 - 25 - 20 - 15 - 10 - 5 0 0 0.001 0.01 0.1 1.0 -20 -40 -35 -30 -25 -15 -10 -5 0 5 10 0.001 0.01 0.1 1.0 8 4567 910111213 thd meter thd meter frequency ? hz level ? db bass characteristics v dd = 9 v,v ss = 0 v,v in = 20 dbv input = l1, output = lf out v dd = 9 v,v ss = 0 v,v in = 20 dbv input = l1, output = lf out frequency ? hz level ? db treble characteristics fader block thd ?input level characteristics input gain block main volume block graphic equalizer block thd ?supply voltage characteristics supply voltage ?v total harmonic distortion, thd ?% fader block input gain block main volume block graphic equalizer block total harmonic distortion, thd ?% input level, v in ?dbv v dd = 9 v, v ss = 0 v 80-khz low pass weighting with v r set to the 0 db position v ss = 0 v 80-khz low pass weighting
this catalog provides information as of march, 2000. specifications and information herein are subject to change without notice. specifications of any and all sanyo products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer? products or equipment. to verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer? products or equipment. sanyo electric co., ltd. strives to supply high-quality high-reliability products. however, any and all semiconductor products fail with some probability. it is possible that these probabilistic failures could give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire, or that could cause damage to other property. when designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. in the event that any or all sanyo products (including technical data, services) described or contained herein are controlled under any of applicable local export control laws and regulations, such products must not be exported without obtaining the export license from the authorities concerned in accordance with the above law. no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written permission of sanyo electric co., ltd. any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. when designing equipment, refer to the ?elivery specification for the sanyo product that you intend to use. information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. sanyo believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. ps no.6170-24/24 LC75386NE-R, 75386nw

▲Up To Search▲

Price & Availability of LC75386NE-R

	To Download LC75386NE-R Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .